1. Field of the Invention
The methods and apparatus of the present invention relate generally to the fabrication of electrical structures by laser etching, and more particularly to the fabrication of high line-density structures having high aspect ratio spaces between relatively large cross-section conductors.
2. Background
Electrical systems very typically include a variety of electrical components mounted upon, or otherwise attached to a substrate. Such a substrate provides mechanical support for component attachment as well as commonly provides a variety of electrically conductive pathways thereon for electrically coupling the various electrical components. One example of such a substrate is the printed circuit board.
Printed circuit board (PCB) technology has been in development for many years. The electrically conductive pathways, or traces, found on printed circuit boards are conventionally formed by processes in which a blanket layer of conductive material, typically copper, is masked and then chemically etched (i.e., wet etched) such that portions of the copper under the mask pattern remain on the board while the exposed portions are removed. However, the conventional wet chemical etch process is an isotropic etch resulting in the traces having sidewalls with curved, or sloping shapes (i.e., not substantially parallel to each other). Another way of describing this geometrical characteristic is that the traces have relatively wide portions immediately adjacent the substrate, and that the traces narrow in width as they extend away from the surface of the substrate. Unfortunately, these isotropic etch results, have adverse consequences for the electrical characteristics of the traces. More particularly, these undesirably formed traces, provide unpredictable resistance and capacitance values as interconnect lines.
Referring to FIGS. 1, 2, and 3, illustrations of the undesired results of conventional wet etching of tin masked copper lines are shown. It is noted that across a typical panel, that is, a substrate or board, it is not uncommon for the plated thickness of copper to vary by plus or minus 12 microns. As can be seen in FIGS. 1-3, several examples of isotropically etched copper traces are shown. FIG. 3 illustrates the results of conventional manufacturing practices in producing features that are nominally 150 microns wide. In addition to sloping sidewalls, it can be seen that the actual feature sizes achieved varies with the varying thickness of copper across the panel. More particularly, trace 304, which was formed in a region of nominal copper thickness, can be seen to be narrower than trace 310, which was formed in a region of less than nominal copper thickness, whereas trace 304 is wider than trace 316, which was formed in a region of greater than nominal copper thickness. FIG. 2 is similar to FIG. 3, but illustrates the results of conventional manufacturing practices in producing features that are nominally 125 microns wide. In addition to the undesirable sloping sidewalls, it can be seen that the actual feature sizes achieved varies with the varying thickness of copper. More particularly, trace 204, which was formed in a region of nominal copper thickness, can be seen to be narrower than trace 210, which was formed in a region of less than nominal copper thickness, whereas trace 204 is wider than trace 216, which was formed in a region of greater than nominal copper thickness. Finally, it can be seen that FIG. 1 illustrates the results of conventional manufacturing practices in producing features that are nominally 100 microns wide, at which point the overetching seen in the thick copper regions produces trace widths which generally tend to be unacceptably narrow, and are usually unworkable for very high speed applications. Still referring to FIG. 1, in addition to undesirable sloping sidewalls, it can be seen that the actual feature sizes achieved varies with the varying thickness of copper. Trace 104, which was formed in a region of nominal copper thickness, can be seen to be narrower than trace 110, which was formed in a region of less than nominal copper thickness, whereas trace 104 is wider than trace 116, which was formed in a region of greater than nominal copper thickness. FIGS. 1-3 illustrate the difficulties encountered in forming traces by conventional methods. This problems are grow worse as the dimensions sought to be achieved grow smaller.
Although printed circuit boards have been used to illustrate the problems encountered in conventional manufacturing of traces, such problems are found in a wide variety of products including space transformers, chip packages, and the like.
What is needed are electrical structures, suitable for products such as the space transformer, where those products have thick metal for current carrying capacity, and high aspect ratio spaces therebetween to provide a high density of conductors per linear measurement unit, and methods for the manufacture of such electrical structures.